Photoelectric conversion devices using photodiodes as photoelectric conversion elements for generating signal charges corresponding to incident light are known in the art. An example of such a photoelectric conversion device is disclosed in, for example, Japanese Laid-Open Patent Application No. 8-293591, which is the subject of U.S. patent application Ser. No. 08/606,995, assigned to the assignee of the present application.
FIGS. 49, 50, and 51 of the present application show the structure of a photoelectric conversion device as disclosed in Japanese Laid-Open Patent Application No. 8-293591. FIG. 49 is a plan view of a photoelectric conversion device 110, FIG. 50 is a cross-sectional view taken along the line X--X shown in FIG. 49, and FIG. 51 is a cross-sectional view taken along the line Y--Y shown in FIG. 49.
As shown in FIGS. 49-51, the photoelectric conversion device 110 comprises as basic elements a photodiode 111 for generating and accumulating a charge corresponding to the incident light; a junction field-effect transistor (JFET) 112 for outputting an electric signal Vout corresponding to the signal charge received by its gate region 112A; a transfer transistor 113 for supplying (or transferring) the signal charge generated by and accumulated in the photodiode 111 to the gate region 112A of the JFET 112; and a reset transistor 114 for removing the signal charge supplied to the gate region 112A of the JFET 112.
FIG. 52 is a circuit diagram including the photoelectric conversion device 110 shown in FIG. 51 and a signal detection circuit 1190 connected to the photoelectric conversion device 110. FIG. 53 is a timing chart showing the waveforms of a driving pulse TG supplied to the transfer transistor QTG (113), a driving pulse .phi.RSG supplied to a gate 114C of the reset transistor QRSG (114), and a driving pulse .phi.RSD supplied to a reset drain 114B of the reset transistor QRSG (114), together with the waveform of the electric signal Vout occurring at the source (node N1) of the JFET 112.
For the sake of convenience, the operation of the photoelectric conversion device 110 will be described beginning from the point in time t10. The driving pulse .phi.RSG changes from a high level to a low level at t10, which causes the reset transistor QRSG to be turned on. While the reset transistor QRSG is turned on, the driving pulse .phi.RSD reaches a readout level (a constant voltage VGH), and this constant voltage VGH is applied to the gate region 112A of the JFET 112 via the drain of the reset transistor QRSG.
The electric signal Vout occurring at the node N1 then becomes the reference signal voltage VD, which corresponds to a dark output.
At t11, the driving pulse .phi.RSG becomes high, which causes the reset transistor QRSG to be turned off, and the voltage of driving pulse .phi.RSD becomes a low level (VGL). At this time, although the gate region 112A of the JFET 112 is now in a floating state, the level of the electric signal Vout occurring at the node N1 remains at VD.
At t12, the driving pulse .phi.RSG returns to the low level again, and the reset transistor QRSG is turned on. Also at t12, the driving pulse .phi.RSD returns to the readout level (the constant voltage VGH), and this constant voltage VGH is applied to the gate region 112A of the JFET 112 via the drain of the reset transistor QRSG.
At t13, the driving pulse .phi.RSG becomes high, which causes the reset transistor QRSG to be turned off, putting the gate region 112A of the JFET 112 in a floating state.
At t14, the driving pulse .phi.TG becomes low, turning on the transfer transistor QTG, whereby the signal charge generated and accumulated in the photodiode 111 corresponding to the incident light is supplied to the gate region 112A of the JFET 112. When the JFET 112 receives the signal charge from the photodiode 111, the source voltage Vout (that is, the electric signal Vout occurring at the node N1) becomes a signal voltage Vs corresponding to the signal charge supplied to the gate region 112A, which signal charge corresponds to the incident light.
At t15, the driving pulse .phi.TG is inverted to the high level, and the photodiode 111 begins again generating and accumulating a signal charge.
At t20, the driving pulse .phi.RSD becomes high and the driving pulse .phi.RSG becomes low and, then, the electric signal Vout occurring at the node N1 becomes the reference signal voltage VD, which corresponds to the dark output.
The two electric signals VD and Vs occurring at the node N1 at different points in time are output to the signal detection circuit shown in FIG. 52. One of these two signal values (for example, VD) is stored and held in a sample-and-hold circuit 1191, and a difference calculation circuit 1192 subtracts this stored value VD from the other electric signal Vs, and outputs a photosignal Vp which does not contain the dark output component VD.
By removing the noise component VD (which results from, for example, fluctuation) from the electric signal Vs in the signal detection circuit 1190, a photosignal Vp is obtained, whereby the photoelectric conversion device 110 can detect the incident light with high accuracy.
In order to block light, the semiconductor area of the photoelectric conversion device 110, except for the photodiode 111, is covered with a reset drain interconnection (i.e., an aluminum interconnection) 1148 (indicated by the region of wide-spaced diagonal top-left to bottom-right hatching in FIG. 49) which is connected to the drain of the reset transistor QRSG.
Other features of the photoelectric conversion device 110 are described in more detail in the detailed description below. These include a P-type semiconductor substrate 1101, an N-type layer 1102, an N.sup.+ -type layer 1103, an insulating layer 1109, a P-type impurity diffusion layer 1121, a vertical signal line 1128, a transfer gate interconnection 1138, a reset gate interconnection 1147, and a transfer gate 113C. These features correspond to features in the example embodiments of the invention with similar reference characters (reference characters identical except for the second digit). The functions of, and relationships between, these features are the same as those described for corresponding features in the example embodiments of the invention below.
FIG. 54 shows a single pixel of a fixed-image image sensor array in which a known photoelectric conversion element similar to that of FIG. 49 is designed and structured for use as a pixel in a two-dimensional array of like pixels. FIG. 54(a) is a plan view, FIG. 54(b) is a cross-sectional view taken along the line X19-X20 in FIG. 54(a), and FIG. 54(c) is a cross-sectional view taken along the line Y19-Y20 in FIG. 54(a).
The structure of the pixel of FIG. 54 is formed on a P-type semiconductor substrate 10 upon which an N-type semiconductor layer 11 is formed. A photodiode 1 functions to accumulate charge in response to incident light. A transfer gate 3 functions as part of a transfer transistor to transfer accumulated charge from the photodiode 1 to an amplification transistor in the form of a JFET 2, specifically, to a gate area 15 of the JFET 2. A reset gate 5 functions as part of a reset transistor in the form of a P-channel MOSFET 9, positioned to selectably electrically connect the gate area 15 with a reset drain 4. The reset gate 5, together with the gate area 15 and the reset drain 4 as major electrodes, forms the P-channel MOSFET 9.
The photodiode 1 comprises a P-type diffusion region 12 with a high-density N.sup.+ -type region 13 overlying the region 12. The JFET 2 comprises a P-type gate region 15 sandwiching an N-type channel region 17, and a high-density N.sup.+ -type source region 14. High-density N.sup.+ -type diffusion regions serve as pixel isolation regions 16 and as a drain region for JFET 2.
A vertical signal line 22 connects the source regions 14 of JFETs 2 in one column of the array. Drain interconnect 25, through drain contact holes 32, provides a low-resistance conduction path for removing charges from and controlling the potential of the drain and pixel isolation/drain region 16. Transfer gate interconnect 20 controls the transfer gates 3 in one row of the array. Similarly, reset gate interconnect 21 controls the reset gates 5 in one row of the array. Reset drain interconnect 24, via contact 31, relay 23, and relay contact 30, controls the potential of the reset drains 4 in one row of the array. Reset drain interconnect 24 also functions as a light shield over JFET 2 and reset drain 4, shielding them from exposure to incoming radiation, while leaving photodiode 1 exposed. An insulating dielectric layer 33 supports and isolates the various interconnections and signal lines.
FIG. 55 is a circuit diagram showing an existing fixed image capture apparatus with the single pixels shown in FIG. 54 arranged in a two-dimensional matrix (m.times.n). The area of FIG. 55 surrounded by the dashed line is the single pixel equivalent circuit.
Each JFET 2 source area 14 (indicated by "S" in FIG. 55), is connected mutually in each matrix column by vertical signal lines 22-1 through 22-n (corresponding to vertical signal line 22 in FIG. 54).
Each JFET 2 drain area 16 (D) is connected to drain power source VDD, which is shared for all pixels, via a diffusion layer formed continuously along all the seams of the web that constitutes the previously discussed N-type drain area 16 and via the drain interconnect 25.
Transfer gate 3 is connected in common in the horizontal scan direction to each row of the matrix by transfer gate interconnects 20-1 through 20-m (corresponding to transfer gate interconnect 20 in FIG. 54) and is connected to vertical scan circuit 7. In addition, each row is driven by drive pulses .phi.TG1 through .phi.TGm provided from vertical scan circuit 7.
Reset gate 5 is connected in common to each row of the matrix in the horizontal scan direction by reset gate interconnects 21-1 through 21-m (corresponding to reset gate interconnect 21 in FIG. 54), and is connected to vertical scan circuit 7. In addition, each row is driven by drive pulses .phi.RSG1 through .phi.RSGm provided from vertical scan circuit 7.
Reset drain 4 is connected in common to each matrix row in the horizontal scan direction (row direction) by reset drain interconnects 24-1 through 24-m (corresponding to reset drain interconnect 24 in FIG. 54), and is connected to vertical scan circuit 7. In addition, each row is driven by drive pulses (drive signals to discharge the charge from JFET2 gate area 15 and to control the potential of said gate area 15) .phi.RSD1 through .phi.RSDm sent from vertical scan circuit 7.
Vertical signal lines 22-1 through 22-n are connected on one hand to constant current sources 26-1 through 26-n. This permits constant current to flow from constant current sources 26-1 through 26-n, thereby forming a source-follower circuit between JFET4 and constant current sources 26-1 through 26-n. The output side of these source-follower circuits (the opposite end of the vertical signal lines 22-1 through 22-n) are connected to sort-processing circuits 27-1 through 27-n, which serve respectively as read circuits. Sort-processing circuits 27-1 through 27-n comprise capacitors 28-1 through 28-n and MOSFET switches 29-1 through 29-n. The gates of switches 29-1 through 29-n are connected in common so as to be activated by pulse .phi.N. The outputs of sort-processing circuits 27-1 through 27-n are connected to signal-output line 34 via horizontal-select switches 39-1 through 39-n. Horizontal-select switches 39-1 through 39-n are activated in sequence by pulses .phi.H1 through .phi.Hn sent from horizontal scan circuit 8, and the output from the sort processing circuits 27-1 through 27-n is output in sequence to signal the output line 34. This output is fed by output line 34 to output amp 35 for amplification and final output. Output signal line 34 is grounded (reset) by switch 36. The switch 36 is activated by a pulse .phi.RH.
With the continuing improvement of semiconductor design and fabrication technologies, the number of pixels in image sensor arrays has increased as pixel size has decreased, but the ratio of light-sensitive surface area to total light-receiving surface area, or aperture ratio, has tended to decline.
To improve the effective aperture ratio of image sensor arrays, on-chip microlenses have been developed. The microlenses collect and focus onto a photosensitive element light from an area larger than the photosensitive element itself. This increases the effective aperture ratio, or the proportion of the image area that is sensitive to light.
Microlens technology has been described in Japanese Patent H9-64325, for example. In the type of fixed-image image sensor array described therein, the area outside a photodiode that serves as a photoelectric conversion element is shielded by a shielding film formed on the array. Only information related to the light entering the photoelectric conversion element during the specified exposure time interval is output outside the array.
FIG. 56 illustrates part of the structure of a fixed-image image CCD-type sensor array equipped with microlenses of this known type. FIG. 56(a) is a plan view of the surface, while FIG. 56(b) is a cross-sectional view taken along the line A-A' in FIG. 56(a). The structure shown in FIG. 56 comprises a vertical electrode 2401, a photodiode 2402, a microlens 2403, an Al (aluminum) light-shielding film 2404, a photodiode N-type semiconductor area 2405, a photodiode P-type semiconductor area 2406, a vertical N-type semiconductor area 2407, and a vertical P-type semiconductor area 2408. The area 2400 indicated by the dashed line in FIG. 56(a) corresponds to a single pixel.
Light entering from the outside is focused onto the photodiode 2402 by the microlens 2403, which, in effect, increases the aperture ratio, the ratio of the light-sensitive surface area to total surface area.
Fixed-image image sensor arrays are typically exposed to a given image for a predetermined exposure interval. But whenever there is a sudden change during the exposure interval in the amount of incoming light, it becomes impossible to read out image information with optimal exposure. Generally this is dealt with by including a mechanical shutter apart from the fixed-image image sensor array, with the quantity of incoming light adjusted by controlling the open-close timing of the shutter. An exposure control sensor capable of monitoring changes in incoming light volume during exposure is typically included. Such a sensor does not monitor the response of the image-sensing array to the incoming light, but rather monitors the incoming light separately from the photosensitive elements of which the image sensor array is comprised.
One goal in the design of a photoelectric conversion apparatus is to improve the exposure control so that optimal exposure is a achieved even when light levels fluctuate significantly during the exposure time.
Another goal in the design of a photoelectric conversion apparatus is to increase the light-receiving area (e.g., the size of the photodiode 111) in each pixel (i.e., in each photoelectric conversion device 110), and to increase the effective light-receiving area.
In the conventional photoelectric conversion device 110, the signal charge generated by the photodiode 111 according to the incident light is amplified by the transistor 112 to generate an electric signal Vout. In order to provide for the amplification function, the transistor 112 and the reset transistor 114 are included, in addition to the photodiode 111, in each pixel (i.e., in each individual photoelectric conversion device). Since the amplification transistor 112 and the reset transistor 114 require a certain amount of space, this limits the maximum size of the photodiode 111 within a pixel.
A third goal in the design of photoelectric conversion devices is to obtain a sufficient amount of the spectral characteristics (i.e., color information) of the incident light when detecting the light using a photoelectric conversion apparatus.
A known example of the use of a photoelectric conversion apparatus is in photometry, which is a method for measuring the properties of an object by emitting light having a specific wavelength toward the object and then detecting the light radiated from that object.
For example, in order to perform photometry using blue light having a specific wavelength, said blue light is emitted toward an object, and the intensity of the light radiated from that object is detected. This radiation contains the blue light component and other light components having wavelengths longer than that of the original blue light. The spectral components of this radiation are detected and analyzed. However, the conventional photoelectric device can detect only a narrow range of spectral components, using a color filter of a specific color.